1. Field of the Invention
The present invention relates generally to programmable logic array devices and more particularly to an improved erasable, electrically programmable logic device made using CMOS EPROM Floating Gate technology.
2. Related Application
The subject matter of this application is related to our co-pending U.S. patent application Ser. No. 607,018, filed May 3, 1984, and entitled "Programmable Logic Array Device Using EPROM Technology". The disclosure of such application is expressly incorporated herein by reference to provide a fundamental explanation of the way in which EPROM transistors may be used to form programmable logic arrays (PLAs).